eFPGA/FPGA Security

Our eFPGA/FPGA Security provides a secure mechanism for booting, verifying, debugging, and scrubbing the eFPGA/FPGA. Secure boot allows only fully encrypted and authenticated bitstreams to be loaded. Secure Verification enables a user to verify/attest the runtime configuration contents are as expected. Secure Debug enables only authenticated users access the JTAG interface to FPGA internal configurations / settings. Finally secure runtime configuration scrubbing ensures that if any configuration errors do occur (i.e. from radiation or tampering attacks), they are automatically corrected internally.