On September 8th of this year, we announced the release of our new Australis™ eFPGA IP Generator tool, touting its ability to quickly generate custom eFPGA IP, optimized for power, performance and area, for nearly any foundry/process node combination. Now, a short seven weeks later, we are announcing the first customer success story in which the SoC development team used the tool to generate their own customized eFPGA IP for UMC’s 22nm process. The proof of the pudding, as they say, is in the eating.

The customer’s motivations reflect many of the reasons we believe that using embedded FPGA technology for SoC applications is a smart design decision. As we noted in our September announcement, these include the ability to address changing market conditions, support the evolution of new standards with the same silicon, customize implementations for intellectual property protection, offload and hardware accelerate AI/ML tasks, or create a range of product variants for fragmented markets. Being able to do that quickly and with the flexibility to easily target the same node as the SoC is using means that these significant benefits come at a very low cost.

Part of the reason we are able to provide this quick-turn, but highly flexible solution is the fact that we have decades of experience in delivering outstanding FPGA technology which is silicon-efficient, reliable, low power, and manufacturable at scale. But the other part of the reason is that we’ve fully embraced the open-source tool paradigm. In fact, the Australis eFPGA IP Generator is built on the OpenFPGA IP Generator which enabled us to deliver the tool quickly and cost effectively.

Once a customer creates their eFPGA IP and integrates it into their SoC, they can develop the FPGA functionality using QuickLogic’s traditional Aurora tool set, or any of a number of open-source design and verification tools. Whatever path they choose, they can expect to get excellent Quality-of-Results.