I am often asked about the differences between ASICs, FPGAs, and ASIC-with-embedded FPGA (eFPGA) blocks and so I thought I would devote a blog article to that topic. Here goes…

Once upon a time, there were ASICs (“Application Specific Integrated Circuits”, for the uninitiated). These were (and are) semiconductor devices designed to implement a very specific set of functions for a particular application. Ironically, ASICs tend to be developed for a customer-specific application, so one could argue they should actually be called CSICs. ASICs can be highly integrated yet still have a relatively small die size, which means their users get a lot of functionality and low per-unit costs. Because ASICs implement their functionality in hardware and are so highly integrated, they can also deliver high performance or run at very low levels of power consumption. Those factors have made ASICs into a multi-billion dollar per year industry.

The downsides of ASICs are that they can be expensive and time-consuming to produce, and they lack flexibility. That lack of flexibility means that design fixes or changes are difficult, time-consuming and expensive – especially at leading-edge process geometries.

A few decades ago a new class of devices called FPGAs (Field Programmable Gate Arrays) was developed to address the lack of flexibility inherent in ASICs. FPGAs have the advantage of being highly flexible – users can change their designs nearly an unlimited number of times – at any point during the development process or even after their product has shipped.

The downside of FPGAs is that their flexibility comes at the cost of larger die sizes and so they are more expensive and higher power consumption than ASICs for an equivalent level of functionality. So then the trade-off designers faced was fundamentally choosing between the higher flexibility of FPGAs versus the lower per unit cost and power consumption of ASICs.

Along the way, someone got the bright idea to integrate a processor into their ASIC, which increased its flexibility dramatically. In fact, today most ASICs have multiple embedded processors and so many other functions that they are often called “Systems on Chips” or SoCs. Now adding a new capability to an ASIC or SoC device can be quick and easy, as long as it can be implemented in software running on one or more of the embedded processors.

However, functions implemented in software running on a processor typically run much slower than the same functions implemented using the hardware-based programmable logic found in FPGAs. Furthermore, the software-based version typically consumes much more power. For both of those reasons the benefit of having the flexibility inherent in a software approach is somewhat reduced, especially for applications which need high performance or low power.

These facts, taken together, create a big dilemma for many product developers. Implementing Artificial Intelligence (AI) for Internet of Things (IoT) endpoint applications is a great example. Designers creating products which integrate this capability need high performance, low power, and low per-unit costs and the flexibility to make changes to their design as necessary to adapt to new AI implementations. So, what’s the solution?

We believe that the answer is embedding FPGA technology (eFPGA) into ASICs and SoCs. This approach allows engineers to achieve near the same low unit cost benefits of ASICs, and the unique high performance/low power/high flexibility combination offered by FPGAs. Now, designers can implement AI algorithms in hardware for high performance and low power while still having the flexibility to make changes as the algorithms evolve.

We’ve worked hard to make this approach as simple and easy as possible. The new SiFive SoC Templates specifically support AI-at-the-endpoint applications, and our EOS S3 Voice and Sensor Processing SoC, as well as eFPGA IP solutions, address the broader need for devices integrating hard ASIC functionality, processors, and programmable logic all in one platform.